Conventional photodiode based imagers, such as active pixel or complementary metal-oxide-semiconductor (CMOS) sensors, utilize a photodiode and a three (3T) or four transistor (4T) sense amplifier per pixel architecture to provide a low impedance representation of the intensity of light that illuminated the photodiode. This picture element, or pixel, is replicated into an X by Y array of pixels which forms a focal plane array (FPA). As is known in the art (e.g., as mentioned in the aforementioned and incorporated by reference Foveal ROIC application), an array of photodiodes is sometimes referred to as a detector array.
The PN junction (also known in the art as a p-n junction) of the photodiode (PD) has a parasitic capacitance, which varies with the reverse bias voltage across the PD. The PD's junction is often a p-i-n junction; that is, the PD is designed to deplete or drain out all of the charge from its collection region at a certain voltage. A p-i-n junction helps to optimize the PD's quantum efficiency, capacitance and linearity. FIG. 1 is a diagram of a standard 4T pixel 10, as is known in the prior art, and includes a p-i-n junction PD 12, a transfer gate (TG) transistor 14, a storage capacitor 16, a source follower (SF) transistor 22, a select transistor 18, and a reset transistor 21 that is responsive to a RESET signal 20. Referring to FIG. 1, first, a reset phase, controlled by the reset transistor 21, is used to clear any previous charge stored on the PD 12. Then, the voltage across PD 12 (and floating diffusion [FD] capacitor, CAPFD, 16) is initialized to a known reverse bias during another reset phase, controlled by turning on both the TG transistor 14 and reset transistor 21.
During an integration phase, the TG transistor 14 is opened, disconnecting the bias source (VRESET 26) from the PD 12, leaving the initial charge stored on the parasitic PD capacitor. When a photon 13 hits the PD 12, it is converted into some number of electrons, each with a charge of one electron volt. The charge is accumulated in the parasitic capacitance, which changes the voltage across the PD 12. The time during which the charge is allowed to accumulate is referred to as the integration time.
During a TG phase, controlled by the TG transistor 14, the charge accumulated on the PD 12 is moved from the PD 12 to the storage capacitor, CAPFD 16, which is often fabricated from FD. The voltage across CAPFD 16 is presented to the gate node of a MOS device 22 which is connected as a non-inverting common drain amplifier, referred to as the SF 22. The SF 22 provides power gain by transforming the high impedance charge into a low impedance voltage output. There is a series row select transistor 18 which enables the SF 22 to drive an output bus (not shown in FIG. 1, but which is in operable communication with the row 30 and column 32 that receive respective row and column select signals, such as row select signal SELECT_1 as shown in FIG. 1), which is shared with other pixels that are typically from the same column. At the end of the output bus 32 is a current sink (not shown in FIG. 1) which biases the one SF 22 that is selected. For example, in one embodiment, the source of the select transistor 18 is connected to a column-based output bus 32. The SELECT_1 signal selects which of the N rows places its voltage on the M column buses 32. Normally, only one row of an array is enabled at a time. This configuration is sometimes referred to as a wired-OR, tri-state or one-hot bus.
The output or column bus 32 can be used to drive a correlated double sampling (CDS) amplifier (not shown in FIG. 1) which is used to remove the spatial error created by the offset variations and 1/f noise of the multiple SFs 22 that are sequentially driving the output bus 32. The output of the SF 22 is sampled first after the reset phase (but before the TG phase) to store the “residual” offset from the reset. A second sample is taken after the TG phase to store the signal, plus offset and noise. The stored offset and signal voltages are subtracted (correlated) to remove the error sources, leaving only the signal, which represents the light intensity.